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PebbleOS v4.43.0-47-g70dbc56d2
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Data Structures | |
| struct | pbl_pinctrl_sf32lb52 |
| SF32LB52 pin controller. More... | |
Macros | |
| #define | PBL_PINCTRL_SF32LB52_PORT_SA 0U |
| SA port. | |
| #define | PBL_PINCTRL_SF32LB52_PORT_PA 1U |
| PA port. | |
| #define | PBL_PINCTRL_SF32LB52_PIN(port, pad, fsel, pinr, field) |
| Pad function, for sf32lb52_pins.h. | |
| #define | SF32LB52_PINCTRL (&pbl_pinctrl_sf32lb52_hpsys.ctrl) |
| HPSYS pin controller. | |
Pad options | |
| #define | PBL_PINCTRL_SF32LB52_PULL_UP (PBL_PINCTRL_SF32LB52_PE | PBL_PINCTRL_SF32LB52_PS) |
| Pull-up. | |
| #define | PBL_PINCTRL_SF32LB52_PULL_DOWN PBL_PINCTRL_SF32LB52_PE |
| Pull-down. | |
| #define | PBL_PINCTRL_SF32LB52_INPUT PBL_PINCTRL_SF32LB52_IE |
| Input buffer enabled. | |
| #define | PBL_PINCTRL_SF32LB52_SLEW_SLOW PBL_PINCTRL_SF32LB52_SR |
| Slow slew rate, ignored on PA39-PA42. | |
| #define | PBL_PINCTRL_SF32LB52_DRIVE_2MA PBL_PINCTRL_SF32LB52_DS_IDX(0) |
| 2 mA drive. | |
| #define | PBL_PINCTRL_SF32LB52_DRIVE_4MA PBL_PINCTRL_SF32LB52_DS_IDX(2) |
| 4 mA drive. | |
| #define | PBL_PINCTRL_SF32LB52_DRIVE_8MA PBL_PINCTRL_SF32LB52_DS_IDX(1) |
| 8 mA drive, not on PA39-PA42. | |
| #define | PBL_PINCTRL_SF32LB52_DRIVE_12MA PBL_PINCTRL_SF32LB52_DS_IDX(3) |
| 12 mA drive, not on PA39-PA42. | |
| #define | PBL_PINCTRL_SF32LB52_DRIVE_20MA PBL_PINCTRL_SF32LB52_DS_IDX(4) |
| 20 mA drive, PA39-PA42 only. | |