I2C HAL implementation for the SF32LB I2C controller. More...

Data Structures
struct	I2CBusHal
	nRF5 bus configuration. More...

Macros
#define	I2C_SF32LB_DMA_MIN_BYTES 32
	Shortest read that goes through DMA.

Functions
void	i2c_irq_handler (I2CBus *bus)
	Controller interrupt handler.

void	i2c_dma_irq_handler (I2CBus *bus)
	Receive DMA interrupt handler.

Detailed Description

I2C HAL implementation for the SF32LB I2C controller.

Deep sleep is blocked while a transfer is in flight. A bus given a receive DMA channel serves i2c_read_register_block_dma() reads of I2C_SF32LB_DMA_MIN_BYTES or more through DMA, so the CPU can sleep through the transfer instead of taking an interrupt per byte.

Data Structure Documentation

◆ I2CBusHal

struct I2CBusHal

nRF5 bus configuration.

SF32LB bus configuration.

Data Fields
IRQn_Type	dma_irqn	Receive DMA interrupt, when the bus has a receive DMA channel.
nrf_twim_frequency_t	frequency	Bus clock frequency.
RCC_MODULE_TYPE IRQn_Type	irqn	Controller clock module. Controller interrupt.
Pinmux	scl	SCL pin.
Pinmux	sda	SDA pin.
I2CBusHalState *	state	Driver runtime state.
nrfx_twim_t	twim	TWIM instance.

Macro Definition Documentation

◆ I2C_SF32LB_DMA_MIN_BYTES

#define I2C_SF32LB_DMA_MIN_BYTES 32

Shortest read that goes through DMA.

Function Documentation

◆ i2c_dma_irq_handler()

void i2c_dma_irq_handler ( I2CBus * bus )

Receive DMA interrupt handler.

Parameters

bus Bus.

◆ i2c_irq_handler()

void i2c_irq_handler ( I2CBus * bus )

Controller interrupt handler.