SiFli SF32LB52 mailbox.
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SiFli SF32LB52 mailbox.
One mailbox block, with 16 doorbells on channel 1. Writing a doorbell interrupts the other subsystem's CPU, so a block either rings the remote (MAILBOX1, from the HCPU) or, when its interrupt reaches this CPU, is rung by it (MAILBOX2, LCPU2HCPU). Specifiers have one cell, the doorbell:
#define SF32LB_HPSYS_RCC
HPSYS RCC clock controller.
Definition sf32lb.h:22
#define SF32LB52_HPSYS_CLK_MAILBOX1
Definition sf32lb.h:28
#define PBL_CLK(_ctrl, _id)
Initializer for a struct pbl_clk.
Definition clk.h:105
#define PBL_MBOX_SF32LB52_DEFINE(sym, _name, _base, _irqn, _clk, _deps)
Define and register a mailbox block.
Definition sf32lb52.h:68
#define PBL_MBOX_SF32LB52_NO_IRQ
Interrupt of a block whose interrupt does not reach this CPU.
Definition sf32lb52.h:36
void pbl_mbox_sf32lb52_irq_handler(const struct pbl_mbox_sf32lb52 *mbox)
Interrupt handler of a block rung by the remote, to connect with PBL_IRQ_CONNECT().
A channel, as used by a consumer.
Definition mbox.h:50
#define PBL_MBOX_CHAN(_ctrl,...)
Initializer of a struct pbl_mbox_chan.
Definition mbox.h:63
#define PBL_IRQN(line)
Number of a SoC interrupt line from soc_irqs.h.
Definition irq.h:93
#define PBL_IRQ_CONNECT(line, prio, isr, arg, flags)
Bind a SoC interrupt line to a handler at build time.
Definition irq.h:117
◆ pbl_mbox_sf32lb52
| Data Fields |
|
uintptr_t |
base |
Base address. |
|
struct pbl_clk |
clk |
Clock, if controlled by this CPU. |
|
struct pbl_mbox_controller |
ctrl |
Controller. |
|
pbl_irq_t |
irqn |
Interrupt, or PBL_MBOX_SF32LB52_NO_IRQ. |
◆ PBL_MBOX_SF32LB52_DEFINE
| #define PBL_MBOX_SF32LB52_DEFINE |
( |
|
sym, |
|
|
|
_name, |
|
|
|
_base, |
|
|
|
_irqn, |
|
|
|
_clk, |
|
|
|
_deps |
|
) |
| |
Value:
&pbl_mbox_sf32lb52_ops, 1U), \
.base = (_base), \
.clk = _clk, \
}; \
PBL_DEVICE_REGISTER(sym, &sym.
ctrl.
dev)
pbl_irq_t irqn
Interrupt, or PBL_MBOX_SF32LB52_NO_IRQ.
Definition sf32lb52.h:48
struct pbl_mbox_controller ctrl
Controller.
Definition sf32lb52.h:44
SF32LB52 mailbox.
Definition sf32lb52.h:42
#define PBL_MBOX_SF32LB52_NUM_DOORBELLS
Doorbells per block.
Definition sf32lb52.h:39
struct pbl_device dev
Device.
Definition mbox.h:130
#define PBL_MBOX_CONTROLLER_STATE_DEFINE(sym, _num_chans)
Define the state of a controller, for providers.
Definition mbox.h:149
#define PBL_MBOX_CONTROLLER_INIT(sym, _name, _init, _deps, _ops, _txpoll_period_ms)
Initializer of a struct pbl_mbox_controller, for providers.
Definition mbox.h:164
Define and register a mailbox block.
- Parameters
-
| sym | Symbol. |
| _name | Device name. |
| _base | Base address. |
| _irqn | Interrupt, or PBL_MBOX_SF32LB52_NO_IRQ if it does not reach this CPU. |
| _clk | Clock, or PBL_CLK(nullptr, 0) if not controlled by this CPU. |
| _deps | Device dependencies. |
◆ PBL_MBOX_SF32LB52_NO_IRQ
| #define PBL_MBOX_SF32LB52_NO_IRQ UINT16_MAX |
Interrupt of a block whose interrupt does not reach this CPU.
◆ PBL_MBOX_SF32LB52_NUM_DOORBELLS
| #define PBL_MBOX_SF32LB52_NUM_DOORBELLS 16U |
◆ pbl_mbox_sf32lb52_irq_handler()
Interrupt handler of a block rung by the remote, to connect with PBL_IRQ_CONNECT().
- Parameters
-