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PebbleOS
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nRF5 UARTE device definition. More...
Data Structures | |
| struct | UARTDeviceState |
| nRF5 UART state, owned by the driver. More... | |
| struct | UARTDevice |
| nRF5 UART device. More... | |
Functions | |
| void | uart_irq_handler (UARTDevice *dev) |
| UART interrupt handler. | |
nRF5 UARTE device definition.
Receive DMA uses a timer counting received bytes to find the DMA write position.
| struct UARTDeviceState |
nRF5 UART state, owned by the driver.
SF32LB UART state, owned by the driver.
QEMU UART state, owned by the driver.
POSIX UART state, owned by the driver.
| Data Fields | ||
|---|---|---|
| const void * | dev | Back pointer to the device. |
| DMA_HandleTypeDef | hdma | HAL DMA handle for reception; the board sets the instance to enable DMA. |
| UART_HandleTypeDef | huart | HAL UART handle; the board sets the instance and line settings. |
| bool | initialized | Device initialized. |
| uint32_t | rx_cache_buffer[8] | UARTE receive cache buffer. |
| uint32_t | rx_cons_index | Index of the receive sub-buffer being consumed. |
| uint32_t | rx_cons_pos | Consumed bytes in the current receive sub-buffer. |
| uint8_t * | rx_dma_buffer | Receive DMA buffer, NULL when not receiving through DMA. |
| uint32_t | rx_dma_index |
Index of the receive sub-buffer queued next to the UARTE. Next unprocessed byte in the receive DMA buffer. |
| uint32_t | rx_dma_length | Size of the receive DMA buffer in bytes. |
| bool | rx_dma_running | Receive DMA running; paused while the receive interrupt is disabled. |
| bool | rx_done_pending | Unused. |
| bool | rx_int_enabled | Receive interrupt enabled. |
| UARTRXInterruptHandler | rx_irq_handler | Receive handler. |
| uint32_t | rx_prod_index | Index of the receive sub-buffer being filled by DMA. |
| uint32_t | tx_cache_buffer[8] | UARTE transmit cache buffer. |
| bool | tx_int_enabled | Transmit interrupt enabled. |
| UARTTXInterruptHandler | tx_irq_handler | Transmit handler. |
| struct UARTDevice |
nRF5 UART device.
SF32LB UART device.
QEMU UART device.
POSIX UART device.
Completes the UARTDevice type forward-declared by the board header.
| Data Fields | ||
|---|---|---|
| uint32_t | base_addr | Register base address. |
| uint8_t | channel | Host end: 0 for the console, 1 for the QEMU serial protocol, 2 for Bluetooth HCI. |
| nrfx_timer_t | counter | Timer counting received bytes. |
| uint32_t | cts_gpio | CTS pin. |
| IRQn_Type | dma_irqn | Receive DMA interrupt. |
| bool | half_duplex | Half-duplex operation. |
| int | irqn | Interrupt number. |
| IRQn_Type | irqn | UART interrupt. |
| nrfx_uarte_t | periph | UARTE instance. |
| uint32_t | rts_gpio | RTS pin. |
| Pinmux | rx | RX pin. |
| uint32_t | rx_gpio | RX pin. |
| UARTDeviceState * | state | Driver state. |
| Pinmux | tx | TX pin. |
| uint32_t | tx_gpio | TX pin. |
| void uart_irq_handler | ( | UARTDevice * | dev | ) |
UART interrupt handler.
Called from the IRQ handler in the board file on nRF5, and connected with PBL_IRQ_CONNECT() in the board file on SF32LB and QEMU.
| dev | Device. |