PebbleOS v4.44.0-46-gef116268a
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SF32LB52 MPI

SPI memory controller driver for the SF32LB52 MPI in NOR mode. More...

Data Structures

struct  pbl_spi_mem_sf32lb52_mpi
 SF32LB52 MPI controller. More...
 

Macros

#define PBL_SPI_MEM_SF32LB52_MPI_DEFINE(sym, _name, _idx, _mem_size, _clk, _flags, _deps)
 Define an SF32LB52 MPI controller.
 

Detailed Description

SPI memory controller driver for the SF32LB52 MPI in NOR mode.

Operations go through the command registers and the 64-byte FIFO: read data comes back through it, and write data is pushed to it byte by byte once the command is issued, so that it only ever holds the bytes the command takes. The memory-mapped window is the read window, programmed with the read operation the memory driver picks.

With PBL_SPI_MEM_XIP, the CPU executes from the memory: the boot code's clock, prescaler and sampling setup are kept, the clock is never gated, and everything that runs while the memory is unreadable (status polling, window changes, power down) runs from RAM with interrupts disabled.

PBL_SPI_MEM_SF32LB52_MPI_DEFINE(s_mpi2, "mpi2", 2, 32U * 1024U * 1024U,
PBL_SPI_MEM_XIP, nullptr);
#define SF32LB_HPSYS_RCC
HPSYS RCC clock controller.
Definition sf32lb.h:22
#define SF32LB52_HPSYS_CLK_MPI2
Definition sf32lb.h:54
#define PBL_CLK(_ctrl, _id)
Initializer for a struct pbl_clk.
Definition clk.h:96
#define PBL_SPI_MEM_SF32LB52_MPI_DEFINE(sym, _name, _idx, _mem_size, _clk, _flags, _deps)
Define an SF32LB52 MPI controller.
Definition sf32lb52_mpi.h:61
#define PBL_SPI_MEM_XIP
The CPU executes from the memory on this controller.
Definition spi_mem.h:219

Data Structure Documentation

◆ pbl_spi_mem_sf32lb52_mpi

struct pbl_spi_mem_sf32lb52_mpi

SF32LB52 MPI controller.

Data Fields
struct pbl_clk clk Clock.
uint8_t idx Instance, 1 or 2.
struct pbl_spi_mem mem Controller.
uint32_t mem_size Memory-mapped window size, in bytes.

Macro Definition Documentation

◆ PBL_SPI_MEM_SF32LB52_MPI_DEFINE

#define PBL_SPI_MEM_SF32LB52_MPI_DEFINE (   sym,
  _name,
  _idx,
  _mem_size,
  _clk,
  _flags,
  _deps 
)
Value:
const struct pbl_spi_mem_sf32lb52_mpi sym = { \
.mem = PBL_SPI_MEM_INIT(sym, _name, _deps, &pbl_spi_mem_sf32lb52_mpi_ops, _flags), \
.idx = (_idx), \
.mem_size = (_mem_size), \
.clk = _clk, \
}; \
PBL_DEVICE_REGISTER(sym, &sym.mem.dev)
uint32_t mem_size
Memory-mapped window size, in bytes.
Definition sf32lb52_mpi.h:41
struct pbl_spi_mem mem
Controller.
Definition sf32lb52_mpi.h:37
SF32LB52 MPI controller.
Definition sf32lb52_mpi.h:35
struct pbl_device dev
Device.
Definition spi_mem.h:233
#define PBL_SPI_MEM_STATE_DEFINE(sym)
Define the class state of controller sym, for the PBL_SPI_MEM_*_DEFINE() macro of a driver.
Definition spi_mem.h:248
#define PBL_SPI_MEM_INIT(sym, _name, _deps, _ops, _flags)
Initializer for the struct pbl_spi_mem of controller sym.
Definition spi_mem.h:262

Define an SF32LB52 MPI controller.

Parameters
symSymbol of the controller.
_nameName.
_idxInstance, 1 or 2.
_mem_sizeMemory-mapped window size, in bytes.
_clkClock, from PBL_CLK().
_flagsFlags, PBL_SPI_MEM_*.
_depsDependencies from PBL_DEVICE_DEPS(), or NULL.