PebbleOS v4.47.0
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Fixed-rate clocks

Clock controller of one clock that always runs at the same rate, as a crystal. More...

Data Structures

struct  pbl_clk_fixed
 Fixed-rate clock. More...
 

Macros

#define PBL_CLK_FIXED_DEFINE(sym, _name, _rate_hz)
 Define a fixed-rate clock, clock 0 of its controller.
 

Detailed Description

Clock controller of one clock that always runs at the same rate, as a crystal.

PBL_CLK_FIXED_DEFINE(s_xtal48m, "xtal48m", 48000000);
#define PBL_CLK_FIXED_DEFINE(sym, _name, _rate_hz)
Define a fixed-rate clock, clock 0 of its controller.
Definition fixed.h:41

Data Structure Documentation

◆ pbl_clk_fixed

struct pbl_clk_fixed

Fixed-rate clock.

Data Fields
struct pbl_clk_controller ctrl Clock controller.
uint32_t rate_hz Rate in Hz.

Macro Definition Documentation

◆ PBL_CLK_FIXED_DEFINE

#define PBL_CLK_FIXED_DEFINE (   sym,
  _name,
  _rate_hz 
)
Value:
PBL_DEVICE_INSTANCE(sym, struct pbl_clk_fixed, struct pbl_clk_controller, ctrl) { \
.ctrl = PBL_CLK_CONTROLLER_INIT(sym, _name, nullptr, nullptr, &pbl_clk_fixed_ops), \
.rate_hz = (_rate_hz), \
}
Fixed-rate clock.
Definition fixed.h:23
A clock controller.
Definition clk.h:75
#define PBL_CLK_CONTROLLER_STATE_DEFINE(sym, _num_clks)
Define the class state of clock controller sym, for the driver's define macro.
Definition clk.h:96
#define PBL_CLK_CONTROLLER_INIT(sym, _name, _init, _parent, _ops)
Initializer for the struct pbl_clk_controller of controller sym.
Definition clk.h:110

Define a fixed-rate clock, clock 0 of its controller.

Parameters
symSymbol of the clock controller.
_nameName.
_rate_hzRate in Hz.